Metal/via programmable gate array integrated circuits (ICs) use macrocells, or “macros,” to define the function of the IC. Such macros include, for example, 10 buffers, PLLs, DLLs, memory cells, etc. Such macros have typically been non-programmable. As a result, making derivative ICs from an existing metal/via programmable gate array IC has typically required extensive re-design. One possible reason for the lack of programmability is the lack of a suitable design methodology to utilize the programmable layer.